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Freescale Semiconductor /MK24F12 /RTC /WAR

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Interpret as WAR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)TSRW 0 (0)TPRW 0 (0)TARW 0 (0)TCRW 0 (0)CRW 0 (0)SRW 0 (0)LRW 0 (0)IERW

LRW=0, SRW=0, CRW=0, TSRW=0, IERW=0, TCRW=0, TARW=0, TPRW=0

Description

RTC Write Access Register

Fields

TSRW

Time Seconds Register Write

0 (0): Writes to the Time Seconds Register are ignored.

1 (1): Writes to the Time Seconds Register complete as normal.
TPRW

Time Prescaler Register Write

0 (0): Writes to the Time Prescaler Register are ignored.

1 (1): Writes to the Time Prescaler Register complete as normal.
TARW

Time Alarm Register Write

0 (0): Writes to the Time Alarm Register are ignored.

1 (1): Writes to the Time Alarm Register complete as normal.
TCRW

Time Compensation Register Write

0 (0): Writes to the Time Compensation Register are ignored.

1 (1): Writes to the Time Compensation Register complete as normal.
CRW

Control Register Write

0 (0): Writes to the Control Register are ignored.

1 (1): Writes to the Control Register complete as normal.
SRW

Status Register Write

0 (0): Writes to the Status Register are ignored.

1 (1): Writes to the Status Register complete as normal.
LRW

Lock Register Write

0 (0): Writes to the Lock Register are ignored.

1 (1): Writes to the Lock Register complete as normal.
IERW

Interrupt Enable Register Write

0 (0): Writes to the Interupt Enable Register are ignored.

1 (1): Writes to the Interrupt Enable Register complete as normal.

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data